Summary : A Brief History about Verilog HDL -

Summary : A Brief History about Verilog HDL -

Summary : History about Verilog HDL (Learn Verilog HDL with Naresh Singh Dobal Series).

Summary about Verilog HDL- 

Verilog was developed in 1984-1985, Initially it was designed by Automated Integrated Design System (AIDS) and later the language becomes the property of Gateway Design Automation and later this was occupied by Cadence and in 1990 Cadence opened this language for public and this became standardized in 1995 by IEEE, and defined by standard IEEE-1364 and trademark of Cadence.

Verilog Development and promotions has been supported by OVI (Open Verilog International).

Records shows Verilog is much popular with ASIC designers because. It is easy to learn, allows fast simulations and effective synthesis.

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Naresh Singh Dobal

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