Monday, 15 July 2013

Design of 2 Bit Comparator using Conditional Operator (Verilog CODE).




Design of 2 Bit Comparator Using Conditional Operator (Data Flow Modeling Style).


Output Waveform :   2 Bit Comparator.



Verilog CODE-


//-----------------------------------------------------------------------------
//
// Title       : comparator_2bit
// Design      : verilog upload
// Author      : Naresh Singh Dobal
// Company     : nsd
//
//-----------------------------------------------------------------------------
//
// File        : 2 Bit Comparator using Conditional Operator.v



module comparator_2bit ( a ,b ,equal ,greater ,lower );

output equal ;
output greater ;
output lower ;

input [1:0] a ;
input [1:0] b ;


assign equal = (a==b) ? 1 : 0;
assign greater = (a>b) ? 1 : 0;
assign lower = (a<b) ? 1 : 0;

endmodule


0 comments :

Post a Comment

 
Design by Wordpress Theme | Bloggerized by Free Blogger Templates | coupon codes