Wednesday, 17 July 2013

Design of toggle Flip Flop using D Flip Flop (Structural Modeling Style) Verilog CODE).





Design of Toggle Flip Flop using D Flip Flop (Structural Modeling STyle) -



Output Waveform  :  Toggle Flip Flop


Verilog CODE -


//-----------------------------------------------------------------------------
//
// Title       : toggle flip flop using D flip flop
// Design      : upload_design1
// Author      : Naresh Singh Dobal
// Company     : nsd
//
//-----------------------------------------------------------------------------
//
// File        : Design of toggle flip flop using d_flip flop.v


module t_flip_flop ( t ,clk ,reset ,dout );

output dout ;

input t ;
input clk ;
input reset ;  

wire ip;
wire op;

assign ip = t ^ op;

d_flip_flop u0 (.din(ip),
.clk(clk),
.reset(reset),
.dout(op));

assign dout = op;


endmodule




// -------------- D flip flop  design - -----------------------



//-----------------------------------------------------------------------------
//
// Title       : d_flip_flop
// Design      : upload_design1
// Author      : Naresh Singh Dobal
// Company     : nsd
//
//-----------------------------------------------------------------------------
//
// File        : d_flip_flop.v



module d_flip_flop ( din ,clk ,reset ,dout );

output dout ;
reg dout;

input din ;
input clk ;
input reset ;

always @ (posedge clk)
begin
if (reset)
dout <= 1;
else
dout <= din;
end

endmodule

1 comments :

Rohith said...

some mistake are their...,in dflipflop
always(posedge clk)
begin
if(reset)
out<=0;

Post a Comment

 
Design by Wordpress Theme | Bloggerized by Free Blogger Templates | coupon codes