Wednesday, 17 July 2013

Design of 4 Bit Subtractor using Structural Modeling Style (Verilog Code).





Design of 4 Bit Subtractor using Structural Modeling Style.



Output Waveform :   4 Bit Subtractor.


Verilog CODE -


//-----------------------------------------------------------------------------
//
// Title       : Subtractor_4bit
// Design      : verilog upload
// Author      : Naresh Singh Dobal
// Company     : nsd
//
//-----------------------------------------------------------------------------
//
// File        : Design of 4 Bit Subtractor using Structural Modeling Style.v


module subtractor_4bit ( a ,b ,diff ,borrow );

output [3:0] diff ;
output borrow ;

input [3:0] a ;
input [3:0] b ;

wire [2:0]s;
wire [3:0]l;

full_adder u0 (a[0],l[0],1'b1,diff[0],s[0]);
full_adder u1 (a[1],l[1],s[0],diff[1],s[1]);
full_adder u2 (a[2],l[2],s[1],diff[2],s[2]);
full_adder u3 (a[3],l[3],s[2],diff[3],borrow);

endmodule




//-------------------- Full  Adder  Design ---------------------



//-----------------------------------------------------------------------------
//
// Title       : full_adder
// Design      : verilog upload
// Author      : Naresh Singh Dobal
// Company     : nsd
//
//-----------------------------------------------------------------------------
//
// File        : full adder design.v

 
module full_adder ( a ,b ,c ,diff ,carry );

output diff ;
output carry ;

input a ;
input b ;
input c ;

assign diff = a ^ b ^ c;  
assign carry = (a&b) | (b&c) | (c&a);

endmodule

1 comments :

brijendra kumar suman said...

what is meaning of l here

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