Design of 2 Bit Binary Counter using Behavior Modeling Style -
Output Waveform : 2 BIT Binary Counter |
Verilog CODE -
//-----------------------------------------------------------------------------
//
// Title : counter_2bit
// Design : verilog upload 4
// Author : Naresh Singh Dobal
// Company : nsdobal@gmail.com
// Verilog Programs & Exercise with Naresh Singh Dobal
//
//-----------------------------------------------------------------------------
//
// File : Design of 2 Bit Counter using Behavior Modeling style.v
module counter_2bit ( clk ,reset ,dout );
output [1:0] dout ;
reg [1:0] dout ;
input clk ;
wire clk ;
input reset ;
wire reset ;
initial dout = 0;
always @ (posedge (clk)) begin
if (reset)
dout <= 0;
else
dout <= dout + 1;
end
endmodule
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