Timer Based Single Way Traffic Light Controller using FSM Technique (Verilog CODE)-

Timing Based Single Way Traffic Light Controller using FSM Technique -

Output Waveform :  Timer Based Single Way Traffic Light Controller.

Verilog CODE -


//-----------------------------------------------------------------------------
//
// Title       : TLC_timer
// Design      : verilog upload 4
// Author      : Naresh Singh Dobal
// Company     : nsdobal@gmail.com
// Verilog Programs & Exercise with Naresh Singh Dobal
//
//-----------------------------------------------------------------------------
//
// File        : Timer based Single Way Traffic Light Controller.v



module TLC_timer ( clk ,r ,y ,g );

output r ;
reg r ;
output y ;
reg y ;
output g ;
reg g ;

input clk ;
wire clk ;

parameter red = 0;
parameter yellow = 1;
parameter green = 2;

reg [1:0] p_state;
reg [1:0] n_state;

initial p_state = red;

always @ (posedge (clk)) begin
p_state <= n_state;
end

always @ (p_state) begin
case (p_state)
red : n_state = green;
green : n_state = yellow;
yellow : n_state = red;
endcase
end

always @ (p_state) begin
case (p_state)
red : begin  
n_state = green;
r = 1;
y = 0;
g = 0;
end
yellow : begin
n_state = red;
r = 0;
y = 1;
g = 0;
end
green : begin
n_state = yellow;
r = 0;
y = 0;
g = 1;
end
endcase
end

endmodule