Small Description about Behavior Modeling Style in Verilog HDL.

Behavior Modeling Style -

• Behavior Modeling Style shows that how our system performs according to current input values.
• In behavior Modeling, we defines that what value we get at the output corresponding to input values.
• We Defines the function / Behavior of our Digital Systems in Behavior Modeling Style.
• Behavior Modeling Style works on Sequential Execution.
• Behavior Modeling style very much similar to C-language.

PROCEDURAL BLOCKS   are the basic building blocks to work on Behavior modeling style.   initial     &     always       are the keyword which converts the way of execution from concurrent execution to sequential execution. 


Syntax - How to use   initial    keyword in Verilog HDL Language.

initial Block -    

Initial Block mainly used in Test Benches and also at those places where our current output depends on the last output and we have to initialize some value to start execution.

initial begin   

        Sequential Statements ; 

end

always Block  -     

Always Block,   As name specifies always Block executes multiple times, We have two methods to trigger the execution of always Block.

• Event based Triggering.  (Depends on the change in signal values).
• Time based Triggering.   (Depends on the time specified).

Syntax - How to use   always    keyword in Verilog HDL Language.

always  @   (Senstivity List) 
begin

        Sequential Statements ; 

end 

All the statements in behavior modeling style must be written in between  concurrent & Sequential   block.


Sequential Block -

begin

     statements.

     ....

     ....

end

Parallel Block -

fork

    statement.

    ....

    ....

join

Behavior Modeling Style Statements -

• If-else Statement.
• CASE Statement.
• Loop Statement.

Sample Programs & LAB Exercise -



Basic Combinational Circuits Design.-

• Design of 4 to 1 Multiplexer using if-else statements.
• Design of 1 to 4 Demultiplexer using if-else statements.
• Design of 4 to 2 Encoder using if-else statements.
• Design of 2 to 4 Decoder using if -else statements.
• Design of 4 to 1 Multiplexer using case statements.
• Design of 1 to 4 Demultiplexer using case statements.
• Design of 4 to 2 Encoder using case statements.
• Design of 2 to 4 Encoder using case statements.
• Design of 4 Bit comparator using if-else statement.
• Design of Binary to Gray Converter using using if-else statement.
• Design of Gray to Binary Converter using if-else statement.
• Design of Binary to Gray Converter using case statement.
• Design of Gray to Binary Converter using case statement.
• Design of BCD to 7 Segment Driver for common andod display using if -else statement.
• Design of BCD to 7 Segment Driver for common cathode display using case statement.

Basic Flip flop Design using Behavior Modeling Style -

• Design of D-Flip Flop using Behavior Modeling Style.
• Design of SR (Set-Reset) Flip Flop using Behavior Modeling Style.
• Design of JK Flip Flop using Behavior Modeling Style.
• Design of Toggle Flip Flop using Behavior Modeling Style.
• Design of D-Latch using Behavior Modeling Style.
• Design of SR - Latch using Behavior Modeling Style.

Shift Registers Design using Behavior Modeling Style -

• Design of Serial IN - Serial OUT using Behavior Modeling Style.
• Design of Serial IN   -  Parallel OUT Shift Register using Behavior Modeling Style.
• Design of Parallel IN - Parallel OUT Shift Register using Behavior Modeling Style.
• Design of Parallel IN - Serial OUT Shift Register using Behavior Modeling Style.

Sample Programs for Loops Statements -

• Design of 4 Bit Adder using For Loop (Verilog CODE).
• Design of 4 Bit Subtractor using For Loop (Verilog CODE).
• Design of 4 Bit adder/subtractor using For Loop (Verilog CODE).

Sample Programs for Basic Systems using Verilog HDL -

• Design of ODD Counter using FSM Technique (Verilog CODE).
• Timer Based Single Way Traffic Light Controller (Verilog CODE).
• Sensor Based Single Way Traffic Light Controller (Verilog CODE).
• Design of 8 Nibble ROM (Memory) using Behavior Modeling (Verilog CODE).
• Design of 8 Nibble RAM (Memory) using Behavior Modeling (Verilog CODE).
• Design of First IN- First OUT Register using Behavior Model (Verilog Code).
• Design of 8 nibble STACK using Behavior Model (Verilog CODE).
• Design of Stepper Motor Controller (Full Step) using Behavior Model (Verilog CODE).
• Design of Stepper Motor Controller (Half Step) using Behavior Model) Verilog CODE.