Monday, 15 July 2013

Design of 4 : 2 Encoder using Conditional Operator (Verilog CODE).



Design of 4 : 2 Encoder using Conditional Operator (Data Flow Modeling Style)-


Output Waveform : 4 : 2 Encoder



Verilog CODE-



//-----------------------------------------------------------------------------
//
// Title       : Encoder4_2
// Design      : verilog upload
// Author      : Naresh Singh Dobal
// Company     : nsd
//
//-----------------------------------------------------------------------------
//
// File        : 4 to 2 Encoder Design using Conditional Operator.v



module Encoder4_2 ( din ,dout );

output [1:0] dout ;

input [3:0] din ;


assign dout = (din==4'b1000) ? 2'b00 :
     (din==4'b0100) ? 2'b01 :
     (din==4'b0010) ? 2'b10 :
     (din==4'b0001) ? 2'b11 :
     2'bZZ;

endmodule

0 comments :

Post a Comment

 
Design by Wordpress Theme | Bloggerized by Free Blogger Templates | coupon codes