Design of 2 to 4 Decoder using if-else statements (Behavior Modeling Style) Verilog CODE

Design of 2 to 4 Decoder using if-else Statements (Behavior Modeling Style).

Output Waveform :  2 to 4 Decoder

Verilog CODE-



//-----------------------------------------------------------------------------
//
// Title       : decoder2_4
// Design      : verilog upload 2
// Author      : Naresh Singh Dobal
// Company     : nsdobal@gmail.com
// Verilog Programs & Exercise by Naresh Singh Dobal.
//
//-----------------------------------------------------------------------------
//
// File        : 2 to 4 decoder using if else statement.v


module decoder2_4 ( din ,dout );

output [3:0] dout ;
reg [3:0] dout ;

input [1:0] din ;
wire [1:0] din ;

always @ (din) begin
if (din==0)
dout = 8;
else if (din==1)
dout = 4;
else if (din==2)
dout = 2;
else
dout = 1;
end

endmodule